Implementation of Two Level DWT VLSI Architecture

The digital data can be transformed using Discrete Wavelet Transform (DWT). The images need to be transformed without loosing of information. The Discrete Wavelet Transform (DWT) was based on time-scale representation, which provides efficient multi-resolution. The lifting based DWT are lower computational complexity and reduced memory requirements. The discrete wavelet transform (DWT) is being increasingly used for image coding. This is due to the fact that DWT supports features like progressive image transmission (by quality, by resolution), ease of transformed image manipulation, region of interest coding, etc. DWT has traditionally been implemented by convolution. DWT has traditionally been implemented by convolution Such an implementation demands both a large number of computations and a large storage features that are not desirable for either high-speed or low-power applications. In this work, the design of Lossless 2-D DWT (Discrete Wavelet Transform) using Lifting Scheme Architecture will be modeled using the Verilog HDL and its functionality were verified using the Modelsim tool and can be synthesized using the Xilinx tool.